Items where Author is "Jeevan, Kanesan"

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Jeevan, Kanesan (2013) Ant System-Corner Insertion Sequence: An Efficient VLSI Hard Module Placer. Advances in Electrical and Computer Engineering, 13 (1). pp. 13-16.

Jeevan, Kanesan (2013) Cost reduction in bottom up hierachical-based VLSI floorplanning designs. International Journal of Circuit Theory And Applications.

Jeevan, Kanesan (2013) Hierarchical congregated ant system for bottom- up VLSI placements. Engineering Applications of Artificial Intelligence (Q1), 26 (1). pp. 584-602.

Jeevan, Kanesan (2013) Variable Ant System for VLSI Multiobjective Floorplanning. Applied Soft Computing, 13 (7). pp. 3285-3297.

This list was generated on Tue May 22 01:33:11 2018 MYT.